While learning AD24 recently, I discovered an issue:
As shown in the screenshot, AD’s DRC check reported a violation:
“[Minimum Solder Mask Sliver Constraint Violation] IP2369_EVM.PcbDoc Advanced PCB Minimum Solder Mask Sliver Constraint: (0.0998mm (3.929mil) < 0.1mm (3.937mil)) Between Pad U1-21 (52.014mm, 25.561mm) on Top Layer And Pad U1-22 (52.014mm, 25.961mm) on Top Layer [Top Solder] Mask Sliver [0.1mm]”
After investigating and manually calculating pad size, solder mask expansion, and pad spacing:
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